ESDA6V1BC6 TRANSIL QUAD SUPPR ESD SOT STMicroelectronics datasheet pdf data sheet FREE from Datasheet (data sheet) search. ESDA6VBC6 STMicroelectronics ESD Suppressors / TVS Diodes Quad Bidirect Array datasheet, inventory & pricing. ESDA6V1-BC6 datasheet,Page:1, ® ESDA6V1BC6 QUAD BIDIRECTIONAL TRANSIL™ SUPPRESSOR FOR ESD PROTECTION ASD™ MAIN APPLICATIONS.
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However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use.
rsda6v1 This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line. No data disturbance was noted on the concerned line. Application Specific Discretes A. For these kind of disturbances it clamps close to ground voltage as shown in Fig. Specifications mentioned esda61v this publication are subject to change without notice.
It is also important to note that in this approximation the parasitic inductance effect was not taken into account. The clamping voltage is given by the following formula: Figure A8 shows that in such a condition, i. This publication supersedes and replaces all information esda6b1 supplied.
Peak forward voltage drop versus peak forward current typical values. Relative variation of leakage current versus junction temperature typical values.
No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. ESD protection is achieved by clamping the unwanted overvoltage. By taking into account the following hypothesis: The measurements performed with falling edges give an impact within the same range.
In usual frequency range of analog signals up to MHz the effect on disturbed line is less than dB. Capacitance versus reverse applied voltage typical values.
PJEC3V3M1FN2 – Bidirectional ESD protection of one line
A3 the high efficiency of the ESD protection: Remaining voltage during ESD surge esea6v1 Peak power dissipation versus initial junction temperature. The perturbed line will be more affected if it works with low voltage signal or high load impedance few k? A3a and -Vf negative way, Fig.
Analog crosstalk measurements 50? STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. Typical analog crosstalk measurements Analog crosstalk dB 0 1 10 frequency MHz 1, Figure A5 gives the measurement circuit for the analog crosstalk application.
Digital crosstalk measurements configuration Figure A7 shows the measurement circuit used to quantify the crosstalk effect in a classical digital application.